NG-Ultra
Radiation Hardened SoC FPGAs COTS
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NG-Ultra COTS is the commercial version of NanoXplore’s NG-ULTRA family of SoC FPGAs. It shares the same patented FPGA architecture co-developed with ST, combining programmable logic with embedded quad-core ARM® Cortex®-A9 processors, memories, and high-speed interfaces. Optimized for industrial and automotive applications, NG-ULTRA COTS delivers high performance, flexibility, and scalability for cost-sensitive markets.
Security
Embedded protection by design, for mission-critical confidence
Reliability
Proven resilience for the harsheet environments, from orbit to the edge
Performance
Scalable performance and flexibility to meet all your system’s needs
Technical specifications
Detailled specifications to ensure optimal performance in every environment
| Device | NX2H300TSA |
|---|---|
| Capacity | |
| - ASIC Gates | 8 000 000 |
| Logic Modules | |
| - Register | 505 344 |
| - LUT-4 | 536 928 |
| - Carry | 126 336 |
| Embedded RAM | 33Mb |
| - DPRAM | 32.256K |
| - Core Register File | 2688 |
| - Core Register File Bits | 1 512K Hardened |
| Clocks | 50/7 |
| Additional Features | |
| - SpaceWire link PHY (8 IOBs) | 20 |
| - DDR2 PHY (11 IOBs) | 20 |
| - DSP Blocks | 1344 |
| - SpaceWire link I/F 430Mbps | 1 |
| - SERDES Tx/Rx 6,5Gbps | 32 |
| - Hard IP Processor core | 4 |
| - SoC Peripherals | YES |
| Design Security | YES |
| Inputs / Outputs | |
| - Complex I/O bank | 10x 34 I/Os |
| - Simple I/O bank | 4x 24 I/Os |
| - Packages - User I/Os | 740 I/Os |
| -BGA1760 45*45mm / 1mm | 436 + SoC 304 |
Radiation Tolerance
Radiation hardening by design in configuration memories and registers
SEU immune up to LET > 60MeV.cm2/mg
Total ionizing dose > 50Krads (Si)
Embedded EDAC for user memory mitigation
Embedded configuration memory scrubbing
Fast automatic memory configuration repair
Main Features
28 nm STMFDSOI process technology.
A full System-On-Chip (SoC) based on a quad-core ARM Cortex R52.
4-Input Look-up tables.
LUT expender to support up to 16 bits boolean functions.
High performance carry chains.
Advanced interconnect network to support random logic and coarse grain block functions.
DSP Blocks for complex arithmetic operations.
User memories with variable width and depth.
Configuration modes: Master Serial SPI (Single, Sequential, TMR), SpaceWire.
Development configuration modes: JTAG, Parallel 16 bits, UART.
Integrated Space Wire interface available for user applications.
• Dedicated lowskew distribution network for clock, reset and load enable signals.
On-chip thermal monitoring capability
On-chip thermal sensor.
Input / Output Features
Multiple I/O powering support from 1.2V to 3.3V.
Cold sparing support.
Programmable output drive to support multiple industry standards.
Embedded logic to support DDR2, DDR3.
Up to 1.6 Gbps maximum I/O support for SSTL, HSTL and POD standards.
LVDS compatible mode.
All pins support 2000V of ESD-HBM.
Embedded logic to support Space Wire Data Strobe encoding.
Programmable delay lines on complex I/O pins.
Programmable resistive termination on complex I/O pins
Documentation
Guiding your project from concept to long term success
For a complete library of user guides, reference manuals and technical documentation,
or if you have an questions about our products, head to our Wiki Page.
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