NG-Medium
FPGAs Radiation Hardened COTS
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NG Medium COTS is an SRAM-based FPGA developed by NanoXplore, sharing the same programmable architecture as the radiation-hardened NG-MEDIUM family. The device integrates a matrix of 4-input Look-up Tables with LUT extenders for wider operations, configurable DFF, Coarse Grain Blocks with user-configurable memories, and dedicated Digital Signal Processing units. Optimized for cost-sensitive applications, NG-MEDIUM COTS delivers high logic density and flexibility for industrial, automotive, and other high-reliability markets.
Security
Embedded protection by design, for mission-critical confidence
Reliability
Proven resilience for the harshest environments, from orbit to the edge
Performance
Scalable performance and flexibility to meet all your system’s needs
Technical specifications
Detailled specifications to ensure optimal performance in every environment
| Device | NX1H35S |
|---|---|
| Capacity | |
| - ASIC Gates | 550 000 |
| Logic Modules | |
| - Register | 32 256 |
| - LUT-4 | 34 272 |
| - Carry | 8 064 |
| Embedded RAM | 2,856Mb |
| - DPRAM | 2,688K |
| - Core Register File | 168 |
| - Core Register File Bits | 168K with ECC |
| Clocks | 24 |
| Additional Features | |
| - SpaceWire link PHY (8 IOBs) | 16 |
| - DDR2 PHY (11 IOBs) | 16 |
| - DSP Blocks | 112 |
| - SpaceWire link I/F 400Mbps | 1 |
| Inputs / Outputs I/O banks | 13 |
| Packages - User I/Os | |
| -FG625 27*27mm / 1mm | 374 |
Radiation Tolerance
Radiation hardening by design in configuration memories and registers.
SEU immune up to LET > 60MeV.cm2/mg.
Total ionizing dose > 50Krads (Si).
Embedded EDAC for user memory mitigation.
Embedded configuration memory scrubbing.
Fast automatic memory configuration repair.
Embedded bitstream integrity check (CMIC).
Main Features
28 nm STMFDSOI process technology.
12-bit ADC, 13-bit DAC
4-Input Look-up tables.
LUT expender to support up to 16 bits boolean functions.
High performance carry chains.
Advanced interconnect network to support random logic and coarse grain block functions.
DSP Blocks for complex arithmetic operations.
User memories with variable width and depth.
Configuration modes: JTAG, Parallel 16 bits, Master Serial SPI, SpaceWire, Flash and UART.
Integrated Space Wire interface available for user applications.
Dedicated lowskew distribution network for clock, reset and load enable signals.
On-chip thermal sensor.
Input / Output Features
Multi voltage I/O support from 1.2V to 3.3V
Cold sparing support.
Programmable output drive to support multiple industry standards.
Embedded logic to support DDR2, DDR3 and DDR4.
Up to 1.6 Gbps maximum I/O support for SSTL, HSTL and POD standards.
LVDS compatible mode.
All pins support 2000V of ESD-HBM.
Embedded logic to support Space Wire Data Strobe encoding.
Programmable delay lines on complex I/O pins.
Programmable resistive termination on complex I/O pins.
Documentation
Guiding your project from concept to long term success
For a complete library of user guides, reference manuals and technical documentation,
or if you have an questions about our products, head to our Wiki Page.
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