NG-Medium

FPGAs Radiation Hardened
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NG-Medium is the first Radiation Hardened by Design (RHBD) SRAM-based FPGA developed by NanoXplore. The programmable matrix is built on an interconnect architecture made of 4-input Look-up tables, DFF, 48K-bits RAM, Carry and 19x24 multipliers in a Digital Signal Processing units offering a high logic density.
Safety
Embedded protection by design, for mission-critical confidence
Reliability
Proven resilience for the harshest environments, from orbit to the edge
Performance
Scalable performance and flexibility to meet the most demanding applications
Technical specifications

Detailled specifications to ensure optimal performance in every environment

DeviceNX1H35S
Capacity
- ASIC Gates550 000
- Logic Modules
- Register32 256
- LUT-434 272
- Carry8 064
Embedded RAM2,856Mb
- DPRAM2,688K
- Core Register File168
- Core Register File Bits168K with ECC
Clocks24
Additional Features
- SpaceWire link PHY (8 IOBs)16
- DDR2 PHY (11 IOBs)16
- DSP Blocks112
- SpaceWire link I/F 400Mbps1
Inputs / Outputs
I/O banks
13
Packages - User I/Os
- LG625374
- CQ352192
Radiation Tolerance
Radiation hardening by design in configuration memories and registers. SEL immune up to LET > 60MeV.cm2/mg. Device Configuration SER < 1.70 10-4 /day (GEO) Total ionizing dose > 100Krads. Embedded EDAC for user memory mitigation. Embedded bitstream integrity check (CMIC).
Spaceship on orbit
Main Features
65 nm STm C65-SPACE process technology. 4-Input Look-up tables. High performance carry chains. Advanced interconnect network to support random logic and coarse grain block functions. DSP Blocks for complex arithmetic operations. User memories with variable width and depth. 5 configuration modes: JTAG, Parallel 8 bits, Parallel 16 bits, Space Wire. Integrated Space Wire interface available for user applications. Dedicated lowskew distribution network for clock, reset and load enable signals. On-chip thermal monitoring capability.
Chip_UE
Input / Output Features
Multiple I/O powering support from 1.8V to 3.3V Cold sparing support. Programmable output drive to support multiple industry standards. Embedded logic to support DDR2 and DDR3. 800 Mbps I/O support. LVDS compatible mode. All pins support 2000V of ESD-HBM. Embedded logic to support Space Wire Data Strobe encoding. Programmable delay lines on all pins. Programmable resistive termination.
Circuit board chip
Documentation

Guiding your project from concept to long term success

For a complete library of user guides, reference manuals and technical documentation, 

or if you have an questions about our products, head to our Wiki Page.

NG-Medium

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Embedded Systems

Bridging the gap between silicon and software, the Embedded Systems team designs the low-level tools that make NanoXplore’s FPGAs truly usable and powerful. 


Their core mission : developing the main SDK (Software Development Kit), firmware, and all embedded components that enable seamless configuration, control, and integration of our devices. From bootloaders and drivers to board support packages and diagnostic tools, they ensure our chips speak the right language whether on a satellite, in a defense system, or in a test environment. Their work is foundational : without it, nothing runs. 


What sets them apart is their ability to think system-wide. They work closely with hardware teams and application engineers, adapt to evolving specs, and support real-world use cases with reliability and reactivity. 

They’re not just writing code : they’re building the ecosystem around our FPGAs.


Driven by curiosity and precision, it’s a team where autonomy meets collaboration, and where each line of code contributes to something bigger : making advanced microelectronics accessible and operational for the most demanding applications.