NG-Ultra
Radiation Hardened SoC FPGAs
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NG-Ultra is the world’s first Radiation Hardened By Design (RHBD) SoC FPGA. His technology is based on patented FPGA architecture developed by NX and industrialized by ST. The hardening techniques used in the NG-ULTRA alongside the FD-SOI technology offers very strong hardening performance.
Security
Embedded protection by design, for mission-critical confidence
Reliability
Proven resilience for the harsheet environments, from orbit to the edge
Performance
Scalable performance and flexibility to meet all your system’s needs
Technical specifications
Detailled specifications to ensure optimal performance in every environment
| Device | NX2H540TSC |
|---|---|
| Capacity | |
| - ASIC Gates | 8 000 000 |
| Logic Modules | |
| - Register | 505 344 |
| - LUT-4 | 536 928 |
| - Carry | 126 336 |
| Embedded RAM | 33Mb |
| - DPRAM | 32.256K |
| - Core Register File | 2688 |
| - Core Register File Bits | 1 512K |
| Clocks | 50 clocks via 7 CKGs |
| Additional Features | |
| - SpaceWire link PHY (8 IOBs) | 20 |
| - DDR2 PHY (11 IOBs) | 20 |
| - DSP Blocks | 1344 |
| - SpaceWire link I/F 430Mbps | 1 |
| - SERDES Tx/Rx 6,5Gbps | 32 |
| - Hard IP Processor core | 4 |
| - SoC Peripherals | YES |
| Design Security | YES |
| Inputs / Outputs | |
| - Complex I/O bank | 10x 34 I/Os |
| - Simple I/O bank | 4x 24 I/Os |
| - Packages - User I/Os | 740 I/Os |
| -BGA1760 45*45mm / 1mm | 436 + SoC 304 |
Radiation Tolerance
Radiation-hardened design applied to configuration memories and registers for enhanced resilience
Single Event Upset (SEU) immunity validated up to LET > 60 MeV.cm2/mg
Total Ionizing Dose (TID) tolerance up to 50Krads (Si), ensuring long-term reliability in harsh environments
Embedded Error Detection and Correction (EDAC) mechanisms safeguard user memory integrity
Main Features
Technology Node: STM 28nm FD-SOI process technology
Processing System: Quad core ARM Cortex R52 based System-on-Chip (SoC)
500K 4-input Look-Up Tables (LUTs)
High-performance carry chains
Advanced interconnect network enabling both logic and coarse-grain block functions
Arithmetic Capabilities: Dedicated DSP blocks for complex computations
User-configurable memories with variable width and depth
Master Serial SPI (Single, Sequential, Triple Modular Redundancy - TMR)
SpaceWire Protocol Support
JTAG
16-bit Parallel
UART
Dedicated lowskew distribution network for clock, reset and load signals
On-chip thermal monitoring for system reliability
Input / Output Features
Multiple I/O voltage supported from 1.2V to 3.3V
Integrated Cold Sparing Capability
Programmable output drive strength to support various industry standards.
Embedded logic to support SpaceWire interface (data strobe encoding)
Embedded logic to support DDR2 and DDR3 memory interfaces
Up to 1.6 Gbps I/O speed for SSTL, HSTL and POD standards
LVDS compatible mode
All I/O pins support 2000V ESD-HBM protection
Programmable delay lines on complex I/O pins
Programmable resistive termination on complex I/O pins
Optional register single rate for direct I/O pins and single or double rate for complex I/O pin
Documentation
Guiding your project from concept to long term success
For a complete library of user guides, reference manuals and technical documentation,
or if you have an questions about our products, head to our Wiki Page.
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